The present invention relates to power factor correction (PFC) converters, and more particularly to interleaved PFC converters.
Electric power is distributed almost universally in an alternating current (AC) format that allows for efficient transmission. Most devices however, including personal computers, televisions, etc., require direct current (DC) power. Power supplies act to convert the AC input supplied by a line to a DC output suitable for consumption by a device or load or act to convert a DC input to a DC output (i.e., a DC-to-DC converter). A switched-mode power supply (SMPS) employing a boost regulator is commonly employed in this role of AC-to-DC or DC-to-DC power conversion. A benefit of employing a SMPS having a boost regulator topology is the boost regulator can be controlled to provide power factor correction. Subsequent stages may be employed to step-down the output of the PFC boost regulator to a desired DC output voltage.
A boost regulator includes an inductor connected between an input and the DC output. A shunt switch is selectively controlled to charge the inductor (during ON times of the switch) and to discharge the inductor to the DC output (during OFF times of the switch). The power capability of a converter may be increased (or alternatively, the size of the converter decreased) by connecting boost regulators in parallel with one another and controlling them in an interleaved manner to provide the desired output.
The frequency of the boost regulator varies with the magnitude of the input and output voltages of the boost regulator. Operation at very low frequencies within the human audible range is undesirable, as it results in audible noise that is distracting to consumers. Prior art solutions employ a frequency clamp that prevents operation at frequencies in the human audible range. However, frequency clamping modifies the duty cycle of the boost regulator (i.e., the ratio of the ON time to the OFF time), which can decrease the overall efficiency of the boost regulator.